Single-chip multi-processing architecture for spaceborne SAR imaging and intelligent processing

星载SAR成像与智能处理的单片多处理架构

School of Computer Science and Engineering, Northwestern Polytechnical University, Xi’an 710072, China

Received: 28 September 2020

Abstract

The satellite-borne SAR image intelligent processing system needs to process on-orbit real-time imaging and various tasks of applications, for which reason designing a dedicated high-efficient single-chip multi-processor is of prioritized necessity that can simultaneously satisfy requirements of real-time and low power consumption. Aiming at on-chip data organization and memory access structure, two typical models of SAR(synthetic aperture radar) imaging CSA (chirp scaling) and neural network VGG-11 are analyzed, and then a collaborative computing model for the intelligent processing on remote sensing is extracted. A strip Tile data processing scheme and a dedicated multi-processing architecture is not only proposed, but a data organization and a caching strategy of Tile space synchronization splicing is also presented. In addition, the designed data caching structure among the processing units greatly reduces off-chip access memory bandwidth while supporting parallel pipeline execution of multi-task model. The chip adopts 28 nm CMOS technology featuring with merely 1.83 W of the overall power consumption, whose throughput and energy efficiency reaches 9.89TOPS and 5.4 TOPS/W, respectively. The present architecture can improve real-time performance of the on-orbit remote sensing intelligent processing platform while reducing the complexity of system designing, which is highly adaptive to differentiated expansions according to different models of algorithm.

摘要

星载SAR图像智能处理系统需对成像和多种不同任务应用进行在轨实时处理，设计高效专用单芯片多处理器能够有效支持实时性和低功耗的要求，片上数据组织和访存结构是设计重点。分析了SAR成像CSA（chirp scaling）和神经网络VGG-11 2种典型模型，抽象出遥感图像智能处理过程的协同计算模型。设计了一种带状Tile化数据处理方案及专用多处理架构，提出了一种Tile划分及多Tile同步拼接策略，设计了处理单元之间数据缓存结构，极大降低片外访存带宽，支持多任务模型的并行流水执行。芯片采用28 nm工艺，整体功耗仅为1.83 W，吞吐率和能效分别达到9.89 TOPS和5.4 TOPS/W。该架构可提高在轨遥感智能处理平台的实时性，降低系统设计复杂度，根据算法模型的不同，可灵活适应差异化扩展。