| Issue |
JNWPU
Volume 43, Number 6, December 2025
|
|
|---|---|---|
| Page(s) | 1246 - 1254 | |
| DOI | https://doi.org/10.1051/jnwpu/20254361246 | |
| Published online | 02 February 2026 | |
Design of linear feedback shift register with single event upset resistance
抗单粒子翻转的线性反馈移位寄存器设计
College of Electronic Engineering, Heilongjiang University, Harbin 150080, China
Received:
24
March
2025
Abstract
The rapid development of China's aerospace industry has rendered the radiation-hardened integrated circuit design critically importance, especially for spacecraft chips requiring protection against cosmic high-energy particle effects. As a fundamental component of built-in self-test (BIST) structures that ensure chip reliability, the radiation hardening of linear feedback shift register (LFSR) necessitates special attention. A comprehensive radiation-hardening methodology for LFSRs through systematic analysis of single-event upset (SEU) mechanisms is proposed. The present approach integrates four synergistic design strategies. Firstly, a radiation-hardened D-flip-flop architecture by using 12-transistor dual-interlocked storage cells (DICE) with bit-line separation technique is implemented. Secondly, at the layout level, radiation hardening capability is enhanced through the implementation of guard rings, sensitive node area minimization and increased spacing between complementary sensitive nodes. Thirdly, a novel power-on-reset (POR) circuit with SEU-immune characteristics is developed to address initialization vulnerabilities. Finally, for XOR gates executing linear operations, the present design integrating C-element with bit-line separation techniques to resist SEU effects. Experimental validation through a 7-stage LFSR demonstrates that the radiation-hardened structure achieves significant SEU immunity enhancement while maintaining operational stability in radiation environments.
摘要
随着我国航空航天事业的大力发展, 为抵御宇宙空间高能粒子的影响, 航天器芯片的高可靠性成为设计的关键。内建自测试技术作为保障芯片质量的常用可测性设计, 其核心部件线性反馈移位寄存器(LFSR)的抗辐射加固设计至关重要。通过分析单粒子翻转(SEU)效应, 提出LFSR中关键电路的抗辐射加固方案, 针对D触发器采用12管双互锁存储单元结构结合位线分离技术, 在版图级增加保护环、减小敏感节点面积与增大互补敏感节点间距等措施, 增强抗辐射能力。通过设计新型POR电路结构, 有效克服LFSR中传统POR电路对SEU的敏感性问题。针对用于线性运算的异或门电路, 运用C单元结合位线分离的方法以抵抗SEU影响。以7阶LFSR为例进行仿真验证, 结果表明所构建的抗辐射加固LFSR结构能有效抵御SEU影响, 显著提升在辐射环境下的稳定性与可靠性。
Key words: radiation hardened / single event upset / linear feedback shift register / power on reset
关键字 : 抗辐射加固 / 单粒子翻转效应 / 线性反馈移位寄存器 / 上电复位电路
© 2025 Journal of Northwestern Polytechnical University. All rights reserved.
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