Memory Compact High-Speed QC-LDPC Decoder Based on FPGA

Tianjiao Xie; Bo Li; Mao Yang; Zhongjiang Yan

doi:10.1051/jnwpu/20193730515

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Volume 37 / No 3 (June 2019)

JNWPU, 37 3 (2019) 515-522

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表2

提出的译码器与现有的LDPC(1296, 648)译码器资源对比

文献	译码算法	量化比特	芯片	时钟频率/Hz	吞吐量/(b·s^-1)	存储器	面积
2015[8]	I-OMS	6	XC6VLX240t	223	2 410	96个36 k和 24个18 k(13%)	LUT:90 872(60%) FF:23 352(8%)
2016[9]	F-SPA	3	XC7VX485t	233	3 350	104个36 k(10%)	LUT-FF: 78 299(16%)
本文	NMSA	6	XC6VLX240t	230	3 680	25个36 k(8%)	LUT:32 805(22%) FF:26 918(9%)

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